bsnes v062.04 beta released - 模擬器

http://byuu.org/

I suppose I should start calling these nightlies, heh. blargg went ahead and
verified every last possible edge case with regards to the S-CPU MUL / DIV
registers. It uncovered a few errors in my implementation, which have since
been corrected. The design used now should be a direct reflection of the
hardware implementation: no actual multiplication, no actual division, and no
variable-length bit-shifting.

We also spent about eight hours straight hammering away at the S-SMP test
register. We have a partial understanding of TEST.d3 and TEST.d0, and a
complete understanding of the other six bits. All of this has been
implemented as well.

Lastly, snesreader gets a tiny update to fix Test Drive II, which broke due
to a slight regression when porting the mapping code to XML.

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